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? semiconductor components industries, llc, 2012 july, 2012 ? rev. 2 1 publication order number: ncp1593/d ncp1593a, NCP1593B 1 mhz, 3 a synchronous buck regulator the ncp1593 is a fixed 1 mhz, high ? output ? current, synchronous pwm converter that integrates a low ? resistance, high ? side p ? channel mosfet and a low ? side n ? channel mosfet. the ncp1593 utilizes internally compensated current mode control to provide good transient response, ease of implementation and excellent loop stability. it regulates input voltages from 4.0 v to 5.5 v down to an output voltage as low as 0.6 v and is able to supply up to 3 a of load current. the ncp1593 includes an internally fixed switching frequency (f sw ), and an internal soft ? start to limit inrush current. other features include cycle ? by ? cycle current limiting, 100% duty cycle operation, short ? circuit protection, power saving mode and thermal shutdown. features ? wide input voltage range: from 4.0 v to 5.5 v ? internal 90 m high ? side p ? channel mosfet and 60 m low ? side n ? channel mosfet ? fixed 1 mhz switching frequency ? cycle ? by ? cycle current limiting ? hiccup mode short ? circuit protection ? overtemperature protection ? internal soft ? start ? start ? up with pre ? biased output load ? adjustable output voltage down to 0.6 v ? diode emulation during light load ? 100% duty cycle operation to extend the battery life ? these are pb ? free devices applications ? set ? top boxes ? dvd drives and hdd ? lcd monitors and tvs ? cable modems ? usb modems ? telecom/networking/datacom equipment device package shipping ? ordering information ncp1593amntwg dfn10 (pb ? free) 3000 / tape & reel dfn10 case 485c marking diagrams http://onsemi.com ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. vccp vccp vcca nc lx lx 1 2 3 10 9 8 ncp1593a (top view) pin connections a = assembly location l = wafer lot y = year w = work week = pb ? free package 1593a alyw (note: microdot may be in either location) ss pg 4 7 fb en 5 6 NCP1593Bmntwg vccp vccp vcca lx lx lx 1 2 3 10 9 8 NCP1593B (top view) nc pg 4 7 fb en 5 6 1593b alyw dfn10 (pb ? free) 3000 / tape & reel gnd gnd free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 2 block diagram figure 1. block diagram ? + + + ? soft ? start power reset uvlo thd hiccup gm pwm control logic osc + ? ca + ncp1593a vccp lx pgnd vcc en fb vref pmos m1 pg lx ss power good 0.9 x vref rc1 cc1 cc2 ri pin descriptions pin no symbol description 1 nc / lx no connect pin for ncp1593a. the user may ground this pin or leave it floating. / lx pin for NCP1593B 2, 3 lx the drains of the internal mosfets. the output inductor should be connected to these pins. 4 pg open drain output from the power good logic. when the fb voltage is within regulation, this is a high impedance pin. otherwise it is pulled low. 5 en logic input to enable the part. logic high to turn on the part and a logic low to shut off the part. an intern- al pullup forces the part into an enable state when no external bias is present on the pin. 6 fb feedback input pin of the error amplifier. connect a resistor divider from the converter?s output voltage to this pin to set the converter?s regulated voltage. 7 ss / nc an external capacitor on this pin sets the soft ? start ramp time. leaving this pin open sets the soft ? start time at 500 s. for NCP1593B this pin is a no connect and should be left floating. 8 v cc input supply pin for internal bias circuitry. connect a 0.1 f ceramic bypass capacitor to this pin. directly connect the v cc pin to the v ccp pin on the board. 9, 10 v ccp input for the power stage ep gnd exposed pad of the package provides both electrical contact to the ground and good thermal contact to the pcb. this pad must be soldered to the pcb for proper operation. free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 3 application circuit figure 2. recommended application circuit vccp vcca en lx lx fb 4.0 v ? 5.5 v v in v out pg ss nc pgnd 9,10 8 5 4 7 2 3 6 1 ep ncp1593 22 f 22 f22 f r1 r2 2.2 h absolute maximum ratings rating symbol value unit power supply pin (pins 8, 9, 10) to gnd v in 6.5 ? 0.3 (dc) ? 1.0 (t < 100 ns) v lx to gnd v in + 0.7 v in + 1.0 (t < 20 ns) ? 0.7 (dc) ? 5.0 (t < 100 ns) v all other pins 6.0 ? 0.3 (dc) ? 1.0 (t < 100 ns) v operating ambient temperature range (note 1) t a ? 40 to +85 c operating junction temperature range (note 1) t j ? 40 to +125 c maximum junction temperature t j(max) +150 c storage temperature range t s ? 55 to +150 c thermal resistance junction ? to ? air (note 2) r ja 68 c/w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. the maximum package power dissipation limit must not be exceeded. p d t j(max) t a r ja 2. r ja measured on approximately 1x1 inch sq. of 1 oz. copper fr ? 4 or g ? 10 board. free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 4 electrical characteristics ( ? 40 c < t j < 125 c, v cc = 4.0 v ? 5.5 v, for min/max values unless noted otherwise) parameter symbol test conditions min typ max unit input voltage range v in 4.0 5.5 v v cc uvlo threshold v uvlo 2.4 2.5 2.9 v uvlo hysteresis v uvlo_hys 320 mv v cc quiescent current i invcc 1.0 1.5 ma vccp quiescent current i invccp 20 50 a shutdown supply current i qshdn 1.8 3.0 a feedback voltage reference voltage v fb 0.591 0.6 0.609 v reference voltage v fb t j = 25 c 0.594 0.6 0.606 v feedback input bias current i fb 10 100 na feedback voltage line regulation (note 3) v cc = 4.0 v to 5.5 v ? 65 db pwm maximum duty cycle (regulating) d.c. max 95 % maximum duty cycle (ldo mode) d.c. ldo vout > d.c. max * v in 100 % minimum controllable on time t onmin 35 ns current limit cycle-by-cycle current limit (note 3) i lim v cc = 5.0 v, t j = 25 c 5.1 a oscillator switching frequency f sw 0.87 1.0 1.13 mhz mosfet?s high-side mosfet on resistance r dsonh i ds = 100 ma, v in = 5.0 v 90 190 m high-side mosfet leakage i lkgh lx = 0 v 10 a low-side mosfet on resistance r dsonl i ds = 100 ma, v in = 5.0 v 60 90 m low-side mosfet leakage i lkgl lx = 5 v 10 a power good power good rising threshold v pgh 0.51 0.54 v power good falling threshold v phl 0.48 0.51 v power good hysteresis (high-to-low) v pghys 30 mv power good pulldown voltage v rpg i pg = 2.5 ma 130 250 mv enable enable high threshold v enhi 1.4 v enable low threshold v enlo 0.4 v enable hysteresis v enhys 200 mv enable pullup current i en 1.4 3.0 a soft-start default soft-start ramp time t ss ss = open; f sw = 1mhz 0.5 0.58 0.65 ms maximum soft-start ramp time t ss ss = max cap; f sw = 1mhz 10 ms hiccup timer 4 * t ss ms soft-start current i ss 0.51 0.7 0.87 a thermal shutdown thermal shutdown threshold 185 c thermal shutdown hysteresis 30 c 3. guaranteed by characterization. free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 5 typical characteristics figure 3. efficiency vs. output current (3.3 v) figure 4. efficiency vs. output current (1.8 v) i out , output current (a) i out , output current (a) 10 1 0.1 0.01 70 75 80 85 90 95 100 figure 5. efficiency vs. output current (1.05 v) figure 6. load regulation (3.3 v) i out , output current (a) i out , output current (a) 2.0 1.6 1.2 1.0 0.8 0.6 0.2 0 3.20 3.22 3.26 3.28 3.32 3.34 3.38 3.40 figure 7. load regulation (1.8 v) figure 8. load regulation (1.05 v) i out , output current (a) i out , output current (a) 2.0 1.4 1.2 0.8 0.6 0.4 0.2 0 1.70 1.72 1.76 1.78 1.82 1.84 1.88 1.90 2.0 1.6 1.0 0.8 0.6 0.4 0.2 0 0.95 0.97 1.01 1.03 1.05 1.09 1.11 1.15 efficiency (%) efficiency (%) efficiency (%) v out , output voltage (v) v out , output voltage (v) v out , output voltage (v) v in = 4.5 v v in = 5.0 v 10 1 0.1 0.01 70 75 80 85 90 95 100 v in = 4.0 v v in = 5.0 v 3.24 3.30 3.36 0.4 1.4 1.8 v in = 4.5 v v in = 5.0 v 10 1 0.1 0.01 65 75 80 85 90 95 100 v in = 4.0 v v in = 5.0 v v in = 4.5 v v in = 5.0 v 1.0 1.6 1.8 1.74 1.80 1.86 1.2 1.4 1.8 0.99 1.07 1.13 v in = 4.5 v v in = 5.0 v 70 free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 6 typical characteristics figure 9. current limit vs. temperature figure 10. current limit vs. input voltage t j , junction temperature ( c) input voltage (v) 110 80 65 20 5 ? 10 ? 25 ? 40 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.50 5.25 5.00 4.75 4.50 4.25 4.00 3.50 3.75 4.00 4.25 4.75 5.00 5.25 5.50 figure 11. r ds(on) vs. temperature figure 12. load transient response t j , junction temperature ( c) 110 85 60 35 10 ? 15 ? 40 45 55 65 75 85 105 115 125 figure 13. load transient response figure 14. no load switching (1.05 v) peak current limit (a) peak current limit (a) r ds(on) (m ) 35 50 95 125 v in = 5.0 v 95 p ? mosfet (hs) n ? mosfet (ls) 4.50 (vin = 5 v, vout = 1.05 v, iout = 0.5 a to 3.0 a) upper trace: output voltage, 50 mv / div lower trace: output current, 2 a / div time = 200 s/div (vin = 5 v, vout = 1.05 v, iout = 0.5 a to 3.0 a) upper trace: output voltage, 50 mv / div lower trace: output current, 2 a / div time = 200 s/div (vin = 5 v, vout = 1.05 v, iout = 0 a) upper trace: lx pin switching waveforms, 5 v / div middle trace: output voltage, 20 mv / div lower trace: inductor current, 100 ma / div time = 20 s / div free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 7 typical characteristics figure 15. no load switching (1.8 v) figure 16. no load switching (3.3 v) figure 17. dcm switching (1.05 v) figure 18. dcm switching (1.8 v) figure 19. dcm switching (3.3 v) figure 20. ccm switching (1.8 v) (vin = 5 v, vout = 1.8 v, iout = 0 a) upper trace: lx pin switching waveforms, 5 v / div middle trace: output voltage, 20 mv / div lower trace: inductor current, 100 ma / div time = 10 s / div (vin = 5 v, vout = 3.3 v, iout = 0 a) upper trace: lx pin switching waveforms, 5 v / div middle trace: output voltage, 20 mv / div lower trace: inductor current, 200 ma / div time = 10 s / div (vin = 5 v, vout = 1.05 v, iout = 100 ma) upper trace: lx pin switching waveforms, 5 v / div middle trace: output voltage, 20 mv / div lower trace: inductor current, 200 ma / div time = 500 ns / div (vin = 5 v, vout = 1.8 v, iout = 150 a) upper trace: lx pin switching waveforms, 5 v / div middle trace: output voltage, 20 mv / div lower trace: inductor current, 200 ma / div time = 500 ns / div (vin = 5 v, vout = 3.3 v, iout = 100 ma) upper trace: lx pin switching waveforms, 5 v / div middle trace: output voltage, 20 mv / div lower trace: inductor current, 200 ma / div time = 500 ns / div (vin = 5 v, vout = 1.8 v, iout = 3 a) upper trace: lx pin switching waveforms, 5 v / div middle trace: output voltage, 20 mv / div lower trace: inductor current, 2 a / div time = 500 ns / div free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 8 typical characteristics figure 21. power on from input voltage figure 22. power off from input voltage figure 23. power on from enable figure 24. power on from enable css = 4.7 n figure 25. power off from enable figure 26. short circuit operation (vin = 5 v, vout = 1.8 v, iout = 3 a) upper trace: input voltage, 5 v / div second trace: power good pin voltage, 5 v / div third trace: output voltage, 2 v / div lower trace: inductor current, 2 a / div time = 1 ms / div (vin = 5 v, vout = 1.8 v, iout = 3 a) upper trace: input voltage, 5 v / div second trace: power good pin voltage, 5 v / div third trace: output voltage, 2 v / div lower trace: inductor current, 2 a / div time = 200 s / div (vin = 5 v, vout = 1.8 v, iout = 3 a, no css) upper trace: enable pin voltage, 5 v / div second trace: power good pin voltage, 5 v / div third trace: output voltage, 2 v / div lower trace: inductor current, 2 a / div time = 2 ms / div (vin = 5 v, vout = 1.8 v, iout = 3 a, css = 4.7 nf) upper trace: enable pin voltage, 5 v / div second trace: power good pin voltage, 5 v / div third trace: output voltage, 2 v / div lower trace: inductor current, 2 a / div time = 2 ms / div (vin = 5 v, vout = 1.8 v, iout = 3 a) upper trace: enable pin voltage, 5 v / div second trace: power good pin voltage, 5 v / div third trace: output voltage, 2 v / div lower trace: inductor current, 2 a / div time = 200 s / div (vin = 5 v, vout = 1.8 v, iout = current limit, no css) upper trace: lx pin voltage, 5 v / div middle trace: output voltage, 2 v / div lower trace: inductor current, 2 a / div time = 500 s / div free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 9 detailed description overview the ncp1593 is a synchronous pwm controller that incorporates all the control and protection circuitry necessary to satisfy a wide range of applications. the ncp1593 employs current mode control to provide fast transient response, simple compensation, and excellent stability. the features of the ncp1593 include a precision reference, fixed 1 mhz switching frequency, a transconductance error amplifier, an integrated high ? side p ? channel mosfet and low ? side n ? channel mosfet, internal soft ? start, and very low shutdown current. the protection features of the ncp1593 include internal soft ? start, pulse ? by ? pulse current limit, and thermal shutdown. reference voltage the ncp1593 incorporates an internal reference that allows output voltages as low as 0.6 v. the tolerance of the internal reference is guaranteed over the entire operating temperature range of the controller. the reference voltage is trimmed using a test configuration that accounts for error amplifier offset and bias currents. oscillator frequency a fixed precision oscillator is provided. the oscillator frequency range is 1 mhz with 13% variation. transconductance error amplifier the transconductance error amplifier?s primary function is to regulate the converter?s output voltage using a resistor divider connected from the converter?s output to the fb pin of the controller, as shown in the applications schematic. if a fault occurs, the amplifier?s output is immediately pulled to gnd and pwm switching is inhibited. soft ? start to limit the startup inrush current, a soft ? start circuit is used to ramp up the reference voltage from 0 v to its final value linearly. this soft ? start time is internally set to a typical value of 500 s, or it can be externally adjusted by adding a capacitor (c ss ) from the ss pin to gnd. the following formulas show how to set the ex ternally adjustable soft-start time. the maximum allowable c ss is 10 nf. t ss c ss v fb i ss (eq. 1) where: v fb : reference voltage, typically 0.6 v i ss : soft ? start current, typically 0.7 a output mosfets the ncp1593 includes low r ds(on) , both high ? side p ? channel and low ? side n ? channel mosfets capable of delivering up to 3.0 a of current. when the controller is disabled or during a fault condition, the controller?s output stage is tri ? stated by turning off both the upper and lower mosfets. pulse width modulation a high ? speed pwm comparator, capable of pulse widths as low as 35 ns, is included in the ncp1593. the inverting input of the comparator is connected to the output of the error amplifier . the non ? inverting input is connected to the the current sense signal. at the beginning of each pwm cycle, the clk signal sets the pwm flip ? flop and the upper mosfet is turned on. when the current sense signal rises above the error amplifier?s voltage then the comparator will reset the pwm flip ? flop and the upper mosfet will be turned off. current sense the ncp1593 monitors the current in the upper mosfet. the current signal is required by the pwm comparator and the pulse ? by ? pulse current limiter. free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 10 protections undervoltage lockout (uvlo) the under voltage lockout feature prevents the controller from switching when the input voltage is too low to power the internal power supplies and reference. hysteresis is incorporated in the uvlo comparator to prevent resistive drops in the wiring or pcb traces from causing on/off cycling of the controller during heavy loading at power up or power down. overcurrent protection (ocp) ncp1593 detects high side switch current and then compares to a voltage level representing the overcurrent threshold limit. if the current through the high side fet exceeds the overcurrent threshold limit for seven consecutive switching cycles, overcurrent protection is triggered. once the overcurrent protection occurs, hiccup mode engages. first, hiccup mode, turns off both fets and discharges the internal compensation network at the output of the ota. next, the ic waits typically 4 x t ss ms and then resets the overcurrent counter. after this reset, the circuit attempts another normal soft ? start. hiccup mode reduces input supply current and power dissipation during a short circuit. it also allows for much improved system up ? time, allowing auto ? restart upon removal of a temporary short ? circuit. pre ? bias startup in some applications the controller will be required to start switching when it?s output capacitors are charged anywhere from slightly above 0 v to just below the regulation voltage. this situation occurs for a number of reasons: the converter?s output capacitors may have residual charge on them or the converter?s output may be held up by a low current standby power supply. ncp1593 supports pre ? bias start up by holding off switching off until the soft start ramp reaches the fb pin voltage. power good power good (pg) is an open-drain output that requires a pull ? up resistor. it is actively held low in soft ? start, standby, and shutdown. pg releases when the fb voltage and thus the output voltage rises above 90% of nominal regulation point. the pg goes low when the fb voltage falls below 85% of the regulation point. thermal shutdown the ncp1593 protects itself from over heating with an internal thermal monitoring circuit. if the junction temperature exceeds the thermal shutdown threshold both the upper and lower mosfets will be shut off. free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 11 application information programming the output voltage the output voltage is set using a resistive voltage divider from the output voltage to fb pin (see figure 27). so the output voltage is calculated according to eq.1. v out v fb r 1 r 2 r 2 (eq. 2) figure 27. output divider fb r2 r1 v out inductor selection the inductor is the key component in the switching regulator. the selection of inductor involves trade ? offs among size, cost and efficiency. the inductor value is selected according to the equation 2. l v out f i ripple 1 v out v in(max) (eq. 3) where v out ? the output voltage; f ? switching frequency, 1.0 mhz; i ripple ? ripple current, usually it?s 20% ? 30% of output current; v in(max) ? maximum input voltage. choose a standard value close to the calculated value to maintain a maximum ripple current within 30% of the maximum load current. if the ripple current exceeds this 30% limit, the next larger value should be selected. the inductor?s rms current rating must be greater than the maximum load current and its saturation current should be about 30% higher. for robust operation in fault conditions (start ? up or short circuit), the saturation current should be high enough. to keep the efficiency high, the series resistance (dcr) should be less than 0.1 , and the core material should be intended for high frequency applications. output capacitor selection the output capacitor acts to smooth the dc output voltage and also provides energy storage. so the major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of the converter. this ripple is related to capacitance and the esr. the minimum capacitance required for a certain output ripple can be calculated by equation 4. c out(min) i ripple 8 f v ripple (eq. 4) where v ripple is the allowed output voltage ripple. the required esr for this amount of ripple can be calculated by equation 5. esr v ripple i ripple (eq. 5) based on equation 3 to choose capacitor and check its esr according to equation 4. if esr exceeds the value from eq.4, multiple capacitors should be used in parallel. ceramic capacitor can be used in most of the applications. in addition, both surface mount tantalum and through ? hole aluminum electrolytic capacitors can be used as well. input capacitor selection the input capacitor can be calculated by equation 6. c in(min) i out(max) d max 1 f v in(ripple) (eq. 6) where v in(ripple) is the required input ripple voltage. d max v out v in(min) is the maximum duty cycle. (eq. 7) power dissipation the ncp1593 is available in a thermally enhanced 10 ? pin, dfn package. when the die temperature reaches +185 c, the ncp1593 shuts down (see the thermal ? overload protection section). the power dissipated in the device is the sum of the power dissipated from supply current (pq), power dissipated due to switching the internal power mosfet (p sw ), and the power dissipated due to the rms current through the internal power mosfet (pon). the total power dissipated in the package must be limited so the junction temperature does not exceed its absolute maximum rating of +150 c at maximum ambient temperature. calculate the power lost in the ncp1593 using the following equations: 1. high side mosfet the conduction loss in the top switch is: p hson i 2 rms_hsfet r ds(on)hs (eq. 8) where: i rms_fet i out 2 i pp 2 12 d
(eq. 9) i pp is the peak ? to ? peak inductor current ripple. the power lost due to switching the internal power high side mosfet is: free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 12 p hssw v in i out t r t f f sw 2 (eq. 10) t r and t f are the rise and fall times of the internal power mosfet measured at sw node. typical rise times are 4 ns (rising) and 2 ns (falling). 2. low side mosfet the power dissipated in the top switch is: p lson i rms_lsfet 2 r ds(on)ls (eq. 11) where: i rms_lsfet i out 2 i pp 2 12 ( 1 d )
(eq. 12) i pp is the peak ? to ? peak inductor current ripple. the switching loss for the low side mosfet can be ignored. the power lost due to the quiescent current (i q ) of the device is: p q v in i q (eq. 13) i q is the switching quiescent current of the ncp1593. p total p hson p hssw p lson p q (eq. 14) calculate the temperature rise of the die using the following equation: t j t c p total ja (eq. 15) jc is the junction ? to ? case thermal resistance equal to 68 c/w. t a is the ambient temperature and tj is the junction temperature, or die temperature. solder the underside ? exposed pad to a large copper gnd plane. if the die temperature reaches the thermal shutdown threshold the ncp1593 shut down and does not restart again until the die temperature cools by 30 c. layout consideration as with all high frequency switchers, when considering layout, care must be taken in order to achieve optimal electrical, thermal and noise performance. for 1.0mhz switching frequency, switch rise and fall times are typically in few nanosecond range. to prevent noise both radiated and conducted the high speed switching current path must be kept as short as possible. shortening the current path will also reduce the parasitic trace inductance of approximately 25 nh/inch. at switch off, this parasitic inductance produces a flyback spike across the ncp1593 switch. when operating at higher currents and input voltages, with poor layout, this spike can generate voltages across the ncp1593 that may exceed its absolute maximum rating. a ground plane should always be used under the switcher circuitry to prevent interplane coupling and overall noise. the fb component should be kept as far away as possible from the switch node. the ground for these components should be separated from the switch current path. failure to do so will result in poor stability or subharmonic like oscillation. board layout also has a significant effect on thermal resistance. reducing the thermal resistance from ground pin and exposed pad onto the board will reduce die temperature and increase the power capability of the ncp1593. this is achieved by providing as much copper area as possible around the exposed pad. adding multiple thermal vias under and around this pad to an internal ground plane will also help. similar treatment to the inductor pads will reduce any additional heating effects. free datasheet http:///
ncp1593a, NCP1593B http://onsemi.com 13 package dimensions dfn10 3x3, 0.5p case 485c issue b 10x seating plane l d e 0.15 c a a1 e d2 e2 b 15 10 6 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. 5. terminal b may have mold compound material along side edge. mold flashing may not exceed 30 microns onto bottom surface of terminal b. 6. details a and b show optional views for end of terminal lead at edge of package. ??? ??? ??? b a 0.15 c top view side view bottom view pin 1 reference 0.10 c 0.08 c (a3) c 10x 10x 0.10 c 0.05 c a b note 3 k 10x dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.18 0.30 d 3.00 bsc d2 2.40 2.60 e 3.00 bsc e2 1.70 1.90 e 0.50 bsc l 0.35 0.45 l1 0.00 0.03 detail a k 0.19 typ 2x 2x l1 detail a bottom view (optional) *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2.1746 2.6016 1.8508 0.5000 pitch 0.5651 10x 3.3048 0.3008 10x dimensions: millimeters on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp1593/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative free datasheet http:///

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